A FPGA friendly 32 bit RISC-V CPU implementation
Assembly
Updated Sep 20, 2018
The extensible bootloader for embedded system with application engine, write once, run everywhere.
C
Updated Sep 20, 2018
VHDL implementation of the RISC-V System-on-Chip based on bare "Rocket Chip".
Verilog
Updated Aug 25, 2018
Threat Hunting Reconnaissance Toolkit
PowerShell
Updated Sep 7, 2018
UI Model major repository
TypeScript
Updated May 2, 2018
Contains information about accepted GSoC 2017 Projects across various organizations along with the proposals.
Updated Mar 24, 2018
Scripts to make life as an NUS student better and easier.
JavaScript
Updated Apr 27, 2018
Riscy-SoC is SoC based on RISC-V CPU core, designed in Verilog
Verilog
Updated Sep 16, 2018
Simple SoC in VHDL with full toolchain and custom board.
VHDL
Updated Jun 4, 2018
The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to …
VHDL
Updated Oct 9, 2015
Probably not the last JS framework you'll live to see
JavaScript
Updated Sep 2, 2018
Must-have verilog systemverilog modules
Verilog
Updated Sep 16, 2018
Cisco Press CCNA Cyber Ops Books and Video Courses supplemental information and additional study materials.
Updated Jan 18, 2018
Code generation tool for control/status registers in a SoC design
Ruby
Updated Feb 9, 2018
CMU 18545 FPGA project -- Multi-channel ultrasound data acquisition and beamforming system.
Verilog
Updated Apr 27, 2016
SHA-256 IP core for ZedBoard (Zynq SoC)
Verilog
Updated Jun 22, 2018
A custom C API for instrumenting Jetson TX1’s SoM and SoC
C
Updated Aug 3, 2018
Top-Level Project for Firebox SoC, consisting of Rocket, BOOM, and peripherals (e.g. Ethernet NIC). This is the defau…
C
Updated Sep 19, 2018
Given a job title and job description, the algorithm assigns a standard occupational classification (SOC) code to the…
Python
Updated Aug 20, 2018
A System on a Chip Implementation for the XuLA2-LX25 board
Verilog
Updated Aug 8, 2017
Embed a JavaScript/WebGL application on a Nvidia Jetson TX2 and stream the results through websockets. It does not re…
JavaScript
Updated Sep 18, 2018
A ZipCPU SoC for the Nexys Video board supporting video functionality
Verilog
Updated Jun 27, 2018
ELVIS is a batch downloader for IVLE workbin. IVLE is used by students in National University of Singapore. This appl…
A curated list of FOSS software appliances for building a SOC
Updated Jan 29, 2018
TX project about hardware accelaration performance on a Xilinx Zynq-7000 SoC ZC702
VHDL
Updated Mar 4, 2017
The Cyber Swiss Army Knife - a web app for encryption, encoding, compression and data analysis
HW/SW compression and decompression of captured image
Verilog
Updated Aug 31, 2017
Exports MISP events to STIX and ingest into McAfee ESM
Python
Updated Jun 27, 2018
Given a job title and job description, the algorithm assigns a standard occupational classification (SOC) code to the…
Python
Updated Aug 20, 2018
Creating dummy load to dissipate maximum power in Xilinx FPGA
SystemVerilog
Updated Apr 8, 2018