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risc-processor

Here are 59 public repositories matching this topic...

mrLSD / riscv-fs

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F# RISC-V Instruction Set formal specification

library cpu fsharp fs riscv isa risc-v risc-processor riscv32 riscv64 riscv-simulator riscv-emulator

Updated Nov 20, 2020
F#

maikmerten / spu32

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Small Processing Unit 32: A compact RV32I CPU written in Verilog

fpga verilog icestorm risc-v ice40 rv32i system-on-chip risc-processor

Updated Jul 11, 2021
C

suyashmahar / RISC-processor

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Simple single cycle RISC processor written in Verilog

assembler risc-processor

Updated Mar 23, 2018
Verilog

lxp32 / lxp32-cpu

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A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set

cpu fpga vhdl risc wishbone soft-core risc-processor wishbone-bus risc-cpu

Updated Sep 1, 2021
Assembly

danielkasza / 9444

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9444 RISC-V 64IMA CPU and related tools and peripherals.

risc-v risc-processor risc-v64

Updated May 20, 2021
C

alirezakay / RISC-CPU

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A multi-cycle RISC CPU (processor) like MIPS-CPU architecture in VHDL ( a hardware-side implementation )

processor-architecture cpu vhdl isa cpu-model instruction-set-architecture mips-processor vhdl-modules risc-processor vhdl-code cpu-architecture multi-cycle processor-design

Updated Jun 19, 2021
VHDL

wannabeOG / CSN-221-Project

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Implementation of a 24 bit RISC processor

verilog pipeline-processor risc-processor

Updated Nov 18, 2019
Verilog

djzenma / RV32IC-CPU

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Implementation of the RISC-V 32 bit Integer and Compressed Instructions in Verilog.

cpu verilog risc hdl pipeline-processor verilog-hdl risc-v rv32i verilog-snippets pipeline-cpu risc-processor riscv32 riscv-simulator rv32imc verilog-code riscv32im

Updated May 29, 2020
Verilog

parshwa1999 / NTP-Microprocessor

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A real time Microprocessor impemented in verilog and tested on Xilinx Artix FPGA.

verilog microprocessor risc-processor artix xillinx

Updated Mar 15, 2021
VHDL

emmapaczkowski / ELEC374

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The purpose of this project is to design, simulate, implement, and verify a simpleRISC Computer (Mini SRC) consisting of a simple RISC processor, memory, and I/O.

risc-processor cpu-design

Updated Apr 10, 2021
Verilog

jofrfu / HAW-V

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Fork of a RISC-V compliant CPU, which originated in a project at the HAW Hamburg

c linux fpga assembly vhdl vivado risc-v xilinx-fpga risc-processor

Updated Mar 6, 2019
VHDL

teivah / majorana

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A RISC-V virtual processor, written in Rust.

rust virtual-machine riscv risc risc-v risc-processor

Updated Aug 26, 2020
Rust

mrLSD / riscv-cpu

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RISC-V five stage pipline CPU

cpu system-verilog risc-v risc-processor pipline

Updated Jul 26, 2019
SystemVerilog

sudhamshu091 / RISC-Processor-32-bit-Verilog

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32 bit RISC Processor

verilog risc risc-v risc-processor verilog-project

Updated Jan 7, 2021
Verilog

Fiser12 / Procesador-Segmentado

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Procesador RISC segmentado creado con Proteus con Unidad de control, 5 segmentos, corrección de errores mediante unidad de detección de conflictos (DC) y ALU.

processor risc proteus risc-processor

Updated Jun 30, 2016

wyvernSemi / riscV

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Open source ISS and logic RISC-V 32 bit project

linux c-plus-plus fpga processor iss embedded-systems verilog cpu-model risc-v soft-core 32-bit risc-processor co-simulation

Updated Aug 14, 2021
C++

sudhamshu091 / Single-Cycle-Risc-Processor-32-bit-Verilog

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Single Cycle RISC MIPS Processor

verilog risc risc-v risc-processor verilog-project

Updated Aug 22, 2021
Verilog

hcyang99 / rv32-core

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Arbitary superscalar out-of-order RV32I core, with instruction prefetching and write-back no-write-allocate DCache.

systemverilog-hdl risc-processor riscv32

Updated Oct 8, 2020
SystemVerilog

evgenabramov / MIPT-Compilers

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🔧 MiniJava language compiler written in C++

bison flex compiler code-generation arm-assembly risc-processor mini-java-language

Updated Sep 5, 2020
C++

ash-olakangal / RISC-V-Processor

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Verilog implementation of multi-stage 32-bit RISC-V processor

verilog computer-architecture risc-v risc-processor

Updated Nov 2, 2020
Verilog

sudhamshu091 / Single-Cycle-Risc-Pipelined-Processor-Verilog

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Single Cycle MIPS Pipelined Processor using Verilog

verilog risc risc-processor verilog-project pipelined-risc

Updated Aug 22, 2021
Verilog

shubhangb97 / RISC-Processor-design

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This repository is a design and implementation of the IIT-B RISC ISA

Updated Dec 7, 2020
VHDL

denishoornaert / ELECH473

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assembly simd assembly-language tis-100 simd-programming risc-processor

Updated May 2, 2018
C

hericlesme / riscv-helpmate

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RISC-V32I Helpmate

tutorial hardware processor risc risc-v risc-processor

Updated Jun 2, 2020
JavaScript

christinojacob / RISC-TILE64-ARCHIETECTURE

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RISC TILE64 implementation in python

risc-processor python-processor

Updated Apr 4, 2017
Python

barrettotte / Subarashii-CPU

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A 16-bit RISC CPU inspired by MIPS. I designed this to learn more about computer architecture/organization.

homebrew cpu verilog risc-processor verilog-cpu

Updated Aug 3, 2020
Verilog

SConsul / RISC-Microprocessor-Design

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VHDL implementation of multicycle and pipelined RISC architecture - EE309 Autumn 2018, IIT Bombay

vhdl pipeline-processor risc-processor multicycle-processor

Updated Dec 3, 2018
VHDL

Daswf852 / GOR2VM

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A R216 virtual machine (or emulator) written in Golang

emulator risc risc-processor

Updated Jan 3, 2019
Go

xerpi / sisa-emu

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SISA Architecture Emulator

c emulator emulator-programming lle risc risc-processor

Updated Jun 29, 2016
C

NaniteFactory / Elevator-with-Atmega128

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A small elevator control system that runs on ATMEL's 8-bit microcontroller.

c microcontroller lcd atmel atmega128 clang switch atmel-studio led risc speaker atmel-avr stepper-motor dot-matrix seven-segments-display push-button risc-processor atmel-avr-microcontroller

Updated Apr 6, 2017
C

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