Pinned

1. fusesoc

   Package manager and build abstraction tool for FPGA/ASIC development

   Python 502 125

2. serv

   SERV - The SErial RISC-V CPU

   Verilog 208 34

3. edalize

   An abstraction library for interfacing EDA tools

   Python 153 51

4. fusesoc/fusesoc-cores

   FuseSoC standard core library

   Verilog 27 9

5. chipsalliance/Cores-SweRVolf

   FuseSoC-based SoC for SweRV EH1

   Coq 47 11

6. fusesoc/fusesoc-generators

   A collection of core generators to use with FuseSoC

   Python 4 3