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188 followers · 50 following · 154

Highlights

  • Arctic Code Vault Contributor

Pinned

  1. cluster-monitoring

    Cluster monitoring stack for clusters based on Prometheus Operator

    Jsonnet 444 129

  2. riscv-bringup

    Risc-V journey thru containers and new projects

    Shell 60 8

  3. kubernetes-arm

    Hybrid Kubernetes Cluster on ARM64 and AMD64 nodes

    Shell 177 48

  4. dcca-server-OTP

    Erlang Diameter Credit Control (DCCA) OTP application

    Erlang 7 6

  5. kube-mediaserver

    Kubernetes Media Server stack

    Dockerfile 10 5

  6. ppc64-bringup

    Tracking and bringing-up projects for the PPC64le architecture

    Shell 2

531 contributions in the last year

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Contribution activity

February 2021

Created 10 commits in 5 repositories
Created 1 repository

Created a pull request in antonblanchard/chiselwatt that received 1 comment

Add support for Microsemi Polarfire FPGA

This PR adds support for Polarfire FPGA from Microchip/Microsemi. The support has also been added to Fusesoc .core file to use the soon-to-be merge…

+142 −34 • 1 comment
Opened 1 other pull request in 1 repository
fusesoc/fusesoc-generators
1 open

Created an issue in chipsalliance/chisel3 that received 4 comments

Dual-port RAM is not synthesized correctly while Single-port does

If I add a second set of ports to a BRAM module, the synthesized verilog does not infer as BRAM (in Yosys for example). Single port: class SinglePo…

4 comments
Opened 2 other issues in 2 repositories
5 contributions in private repositories Feb 3

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