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riscv-isa-sim
Spike, a RISC-V ISA Simulator
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configuration-structure
RISC-V Configuration Structure
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riscv-j-extension
Working Draft of the RISC-V J Extension Specification
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riscv-openocd
Fork of OpenOCD that has RISC-V support
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riscv-elf-psabi-doc
A RISC-V ELF psABI Document
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riscv-debug-spec
Working Draft of the RISC-V Debug Specification Standard
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riscv-asm-manual
RISC-V Assembly Programmer's Manual
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riscv-edk2-platforms
Port of EDK2 implementation of UEFI to RISC-V. See documentation at:
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riscv-edk2
Port of EDK2 implementation of UEFI to RISC-V. See documentation at:
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riscv-gnu-toolchain
GNU toolchain for RISC-V, including GCC
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riscv-binutils-gdb
RISC-V backports for binutils-gdb. Development is done upstream at the FSF.
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opensbi
RISC-V Open Source Supervisor Binary Interface
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riscv-v-spec
Working draft of the proposed RISC-V V vector extension
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riscv-newlib
RISC-V port of newlib
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riscv-pk
RISC-V Proxy Kernel
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riscv-fast-interrupt
Proposal for a RISC-V Core-Local Interrupt Controller (CLIC)
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risc-v-getting-started-guide
The official RISC-V getting started guide
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riscv-isa-manual
RISC-V Instruction Set Manual
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riscv-uefi-edk2-docs
Documentation and status of UEFI on RISC-V
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homebrew-riscv
homebrew (macOS) packages for RISC-V toolchain
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riscv-bitmanip
Working draft of the proposed RISC-V Bitmanipulation extension
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meta-riscv
OpenEmbedded/Yocto layer for RISC-V Architecture