pulp-platform
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Pinned repositories
Repositories
axi
AXI4 and AXI4-Lite synthesizable modules and verification infrastructure
hci_interconnect
Heterogeneous Cluster Interconnect to bind special-purpose HW accelerators with general-purpose cluster cores
fpnew
Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
pulp
This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain accelerated by a PULP cluster with 8 cores.
pulp_cluster
The multi-core cluster of a PULP system.
pulp-configs
Contains JSON description of pulp configurations
hwpe-stream
IPs for data-plane integration of Hardware Processing Engines (HWPEs) within a PULP system
common_cells
Common SV components
hwpe-ctrl
IPs for control-plane integration of Hardware Processing Engines (HWPEs) within a PULP system
pulpissimo
This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.
hwpe-tb
Template testbench for HWPEs (using the hwpe-mac-engine as example)
stream-ebpc
Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Lukas Cavigelli, Georg Rutishauser, Luca Benini.
pulp-runtime
Simple runtime for Pulp platforms
hwpe-mac-engine
An example Hardware Processing Engine