If you speak another language, I would appreciate your help in translating the README.md.

For tables, checklists, or other data that might change, please indicate that that information is in the main README. Otherwise every change to the main README will need to be replicated to the other READMEs.

^ I've tried to do this a bit in the French README. The only thing you need to replicate when

See first line:

Want:

typedef enum uint8_t {
  kFoo,
  kBar
} foo_t;

Got:

typedef enum uint8_t{
  kFoo,
  kBar
} foo_t;

Fix needs to add a case here:

https://github.com/google/verible/blob/0a331418dd3ba7cd8c98a8436f380638f0aeac91/verilog/formatting/token_annotator.cc#L336

by checking for context being immediately inside an en

SweRV still uses a custom generator script and it seems that it's file list is outdated (#894)
It should be fairly easy to migrate it to use FuseSoC generator since the core has FuseSoC config and with FuseSoC we won't need to manually update the file list

When running the regression, the resulting logs seem to end up in third_party/tests/$TEST/.... This of course is not unnoticed by git, so a git status shows a ton of non-added new files added.

To reproduce:

make
make regression
git status   # observe all the files

Build or test artifacts should never clutter the rest of the code-base (we should regard them as read-only in

• AxProt[0]
  • 0: Unprivileged access
  • 1: Privileged access
• AxProt[1]
  • Secure access
  • Non-secure access
• AxProt[2]
  • Data access
  • Instruction access