open-sdr

Repositories

• openwifi

  open-source IEEE802.11/Wi-Fi baseband chip/FPGA design

  linux fpga zynq hls wifi verilog xilinx
  C AGPL-3.0 236 1,710 3 1 Updated Mar 22, 2021

• openwifi-hw

  FPGA/hardware design of openwifi

  linux fpga zynq hls verilog xilinx sdr
  Verilog AGPL-3.0 77 182 0 0 Updated Mar 12, 2021

• openofdm

  Forked from jhshi/openofdm

  Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.
  Verilog Apache-2.0 69 26 0 0 Updated Nov 6, 2020