𝐷𝑟. 𝐼𝑎𝑛 𝐶𝑢𝑡𝑟𝑒𝑠𝑠Account verificato

@IanCutress

I eat wafers | Senior CPU Editor, | TechTechPotato 💻💻🥔 | Erdős-Bacon-Sabbath of 13

Mr. Worldwide
Iscrizione a giugno 2011

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  1. Tweet fissato

    Here is the video on the AMD NUC situation. Enjoy. Also a soft launch of my new Youtube channel, 💻💻🥔 Don't forget to like and subscribe? I'll be doing some of the non-AT related discussion and stuff here.

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  2. Seems oddly printed.

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  3. Similarly, AMD/Intel reserve the right to adjust the bins on their products without saying anything. Adjusting the 3.0 GHz point up or down 0.025 mV for yield could happen, and you wouldn't even know.

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  4. Seriously though, I asked SSD vendors back then if they would commit that they will never change controllers or NAND on a product currently in market. None of them would outright. They reserve the right to replace like-for-like mid-cycle. Some do change product rev, others do not

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  5. Re: the news that some SSD vendors change controllers and/or NAND in a product mid-cycle. My take: By the time we wrote about it in 2014 *!*, it was already old hat, and we were criticized for being late to report. So why is it suddenly news in 2020?

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  6. Annulla
  7. Remember a time when Intel made Arm CPUs for smartphones? has the info. This was way ahead of its time

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  8. Dang Intel, you really have filled my schedule

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  9. Come with me And you'll see Some memes of failed technologee

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  10. 3 dic

    If you were going to plan a new system (not upgrading), which form factor would you go with? The more answers the better please 👍

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  12. My goal was to transform the serial compute into something MT, so that the individual workload was faster. I then ported a form of it to GPUs. That was basically my PhD thesis.

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  13. This is coming from a guy who worked in a research group where every simulation was ST. The way they took advantage of 4C machines was to run 4 threads. They didn't look at turning the code MT, so the limit of their perf is strictly a serial instruction path.

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  14. ST tests are testing the efficacy of that single serial stream of workload. If you can double your workload across two threads, then good for you - make it a million threads across a million cores, increase your throughput. You have TLP. Most workloads do not.

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  15. To add to this, saying that x86 vs arm ST benchmarks are wrong because you're not using the whole core is SMT2 is still a very bad argument. If a workload is serially limited, you can't multi-thread it. *Most* of workloads are serially limited. You don't just add MT.

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  16. I went into this testing with an open mind. I'm still undecided, and it's a topic we've been discussing internally a lot, especially with super wide M1 cores now available. What are your opinions?

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  17. The Crown Idle I'm pretty sure that's the game Prince Charles is playing anyway

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  18. 3 dic

    It's true I did a thing! My first 3D printer review for Windows Central, but also my first resin printer. Thanks to Anycubic and SirayaTech for the resin used in this review as well <3

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  19. This is DCG, not CCG. Not consumer focused.

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  20. Atom based Xeons coming to TSMC.

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  21. 'You will play a key role in the development and integration of QAT into Atom ; Xeon based SOC on Intel and TSMC process' So, Atom-based Xeon? Like Snow Ridge? or Atom+Xeon, like a hybrid?

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