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verilog
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In C++ instead of using the syntax (void)unused_param, it is customary to simply leave the parameter unnamed. Now that all libraries are C++, we can do this universally and deprecate COCOTB_UNUSED.
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Jun 3, 2021 - Verilog
Thanks for taking the time to report this.
What would you like added/supported?
// File: dly_warning.sv
// verilator lint_off ASSIGNDLY
module dly_warning (
input logic a_in,
input logic [2:0] delaycw,
output logic a_out
);
timeunit 1ns;
timeprecision 1ns;
time dly;
assign dly = 5 * delaycw;
assign #dly a_out = a_in; // Warning ASS-
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Apr 22, 2021 - JavaScript
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Tuo Xie requested the ability to visualize clocking (pins & wires I believe). We should make it easier to visualize subsets of the device routing resource and types of routing nets.
Proposed Behaviour
Add filtering to the rr_nodes displayed (ToggleRR), and to the nets displayed (ToggleNets). I think we should have an option to filter what is shown by node type, node name (segment or pin t
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I have been experimenting with replacing the old
Enums with the newChiselEnuminrocket-chip. One important function that is used a lot, but missing fromChiselEnumisisOneOf. This should be fairly straight forward to implement in a type-safe manner.