Pinned

1. fusesoc

   Package manager and build abstraction tool for FPGA/ASIC development

   Python 727 151

2. serv

   SERV - The SErial RISC-V CPU

   Verilog 485 85

3. edalize

   An abstraction library for interfacing EDA tools

   Python 337 89

4. fusesoc/fusesoc-cores

   FuseSoC standard core library

   59 18

5. chipsalliance/Cores-SweRVolf

   FuseSoC-based SoC for SweRV EH1

   Verilog 115 31

6. fusesoc/fusesoc-generators

   A collection of core generators to use with FuseSoC

   Python 6 7