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artix-7

Here are 26 public repositories matching this topic...

ultraembedded / biriscv

Sponsor

32-bit Superscalar RISC-V CPU

linux asic cpu fpga verilog xilinx superscalar in-order risc-v branch-prediction coremark rv32i verilator riscv-linux rv32im artix-7 pipelined-processors

Updated Sep 18, 2021
Verilog

ultraembedded / FPGAmp

Sponsor

720p FPGA Media Player (RISC-V + Motion JPEG + SD + HDMI on an Artix 7)

fpga mjpeg hdmi sd-card motion-jpeg rtos vga risc-v jpeg-decoder ir-codes artix-7 fpga-media-player hd-video

Updated Nov 21, 2020
C

ZAP

krevanth / ZAP

ZAP : A v5TE Superpipelined ARM Processor with Caches, MMUs and TLBs (140MHz @ Artix-7 FPGA)

Updated Jun 12, 2022
SystemVerilog

Mario-Hero / Async-Karin

Async-Karin is an asynchronous framework for FPGA written in Verilog. It has been tested on a Xilinx Artix-7 board and an Altera Cyclone-IV board.

fpga async asynchronous verilog cyclone-iv asynchronous-framework artix-7 async-karin async-circuit

Updated Dec 14, 2020
Verilog

ultraembedded / usb2sniffer

Sponsor

USB2Sniffer: High Speed USB 2.0 capture (for LambdaConcept USB2Sniffer hardware)

fpga usb rtl verilog wireshark xilinx-vivado usb-debugging usb-scanning artix-7 usb2 usb-analyzer usb-sniffer lambdaconcept-usb2sniffer-hardware

Updated Jun 6, 2020
Verilog

HDU_CO_Guide

liolok / HDU_CO_Guide

HDU Computer Organization Course Design Beginner Guide - 杭电计组课设新手指南

verilog vivado computer-organization course-design artix-7

Updated May 13, 2019
Verilog

j3soon / Handwritten-Digit-Recognition-Painter

A handwritten digit recognition painter implementation on Basys 3 Artix-7 FPGA using Verilog.

deep-learning hardware verilog basys3 painter artix-7

Updated Dec 19, 2019
VHDL

michaelriri / 16-bit-risc-processor

A 16-bit Reduced Instruction Set Computing(RISC) processor capable of fetching and executing a set of 16-bit machine instructions.

fpga verilog risc artix-7

Updated Oct 1, 2017
Verilog

raleighlittles / Applied_Digital_Logic_Exercises_Using_FPGAs

Sponsor

Selected projects from "Applied Digital Logic Exercises using FPGAs", by Kurt Wick.

fpga verilog vivado hdl basys3 artix-7 microblaze-mcs applied-digital-logic-exercises

Updated Jan 12, 2022
Verilog

f4pga-xc-fasm2bels

SymbiFlow / f4pga-xc-fasm2bels

Library to convert a FASM file into BELs importable into Vivado.

tcl verilog vivado fasm bitstream artix-7 symbiflow

Updated May 25, 2022
Verilog

tuhalf / SOMvhdl

A simple and scaleable Self Organizing Map implementation written in VHDL. Tested on ARTYA7-35T board.

data-science data-mining fpga vhdl som kohonen-map self-organizing-map arty artix-7

Updated Jan 31, 2021
VHDL

7enTropy7 / Artix_7

My experiments with Nexys4 DDR Artix-7 FPGA Board

verilog nexys4ddr verilog-project fpga-programming artix-7

Updated Oct 1, 2020
Verilog

nikhil-garg / OLED_driver_artix7

OLED driver for artix 7(Nexys 4) FPGA board.

fpga driver oled ssd1306 xilinx-vivado xilinx-sdk artix-7

Updated Jun 28, 2019
C

whutddk / YJ432-PL-PS

ARM+FPGA borad demo

cortex-m4 hw-sw-co-design arm-fpga artix-7 flexbus

Updated Sep 4, 2019
C

cajt / cmod-a7-35t_leon3

GRLIB GPL support for Digilent CMOD A7 35T board

fpga vhdl sparc fpga-soc digilent cmod leon3 grlib artix-7

Updated Jan 5, 2020
VHDL

tmahlburg / picosoc-basys3

Wrapper module for the PicoSoC to support the Digilent Basys 3

verilog xilinx vivado risc-v basys3 picorv32 digilent artix artix-7 picosoc

Updated Apr 27, 2021
Verilog

whutddk / verilogRisc

基于蜂鸟E203的魔改

risc-v e203 artix-7

Updated Nov 28, 2019
Verilog

ilyajob05 / verilog_SPI

SPI module for Nexys 4 Artix-7 FPGA Trainer Board

fpga verilog spi xilinx xilinx-fpga nexys4 fpga-programming nexys-4-spartan-3e artix-7 nexys4-board

Updated May 4, 2020
Verilog

SnrNotHere16 / FPGADivisionFloatingPoint

A series of projects using the floating point division IP from Xilinx to perform floating point (single precision) division. Boards used: ZYBO and NEXYS4DDR (ARTIX-7)

c sdk fpga zynq verilog xilinx floating-point hdl division xilinx-vivado microblaze zynq-7000 nexys4ddr floating-ip artix-7 floating-point-conversion

Updated Apr 5, 2022
VHDL

Yazmau / Verilog-Game-Tetris

A tetris-game on screen using verilog.

hardware verilog tetris-game artix-7 basys3-fpga

Updated Jan 15, 2020
Verilog

BabarZKhan / IntelOneAPI

fpga compiler hpc parallel-computing artix-7 intel-oneapi

Updated Mar 29, 2022
HTML

34-Engineering / Virtex-HDL

This repository contains the Xilinx Vivado project for the Artix-7 (XC7A35T-1FTG256C) FPGA on Virtex.

fpga vivado systemverilog artix-7

Updated May 7, 2022
SystemVerilog

AlmuHS / Binary_to_BCD_Display

Project to show in a BCD display a value set in binary

fpga vhdl xilinx-fpga xilinx-vivado artix-7 bcd-display

Updated Dec 1, 2020
VHDL

DanMartyns / ReconfigurableComputingProject

A project for the discipline of Reconfigurable Computing of the University of Aveiro

c fpga vhdl nexus artix-7

Updated May 23, 2019
VHDL

whutddk / MK64F-platform

A PCB platform based on the architecture of Arm + FPGA

pcb xilinx cortex-m4 freescale nxp mk64 arm-fpga artix-7 xc7a35t

Updated Apr 23, 2019
HTML

Ioritzaro / FPGA--Game--PingPong

Ping Pong Game in VHDL

fpga digital vhdl vivado xilinx-fpga arty vhdl-code artix-7

Updated Oct 7, 2019

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