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@pulp-platform

pulp-platform

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  1. pulp Public

    This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain accelerated by a PULP cluster with 8 cores.

    SystemVerilog 218 63

  2. This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.

    C++ 211 107

  3. snitch Public

    Lean but mean RISC-V system!

    SystemVerilog 119 16

  4. hero Public

    Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and an application-class host CPU, including full-stack software …

    SystemVerilog 16 3

  5. axi Public

    AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

    SystemVerilog 415 122

  6. ara Public

    The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 0.10, working as a coprocessor to CORE-V's CVA6 core

    C 104 27

Repositories