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63 public repositories
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Raspberry Pi PCI Express device compatibility database
Updated
Jun 22, 2022
HTML
OCP Mezzanine card V2.0 to standard PCIe slot adapter design
Updated
Sep 17, 2021
KiCad Layout
Build userspace NVMe drivers and storage applications with CUDA support
Updated
Apr 30, 2021
Python
Automatically bind a PCI device and all of it's IOMMU group members to vfio-pci
Updated
Jan 30, 2022
Shell
Updated
Jun 27, 2022
Python
Raspberry Pi 4 PCIe Bridge "Chip"
An FPGA I/O Device which services physical memory reads/writes via UMDF2 driver
Updated
Jun 28, 2018
Verilog
Giddy - A lightweight GPU decompression library
Tartan: Evaluating Modern GPU Interconnect via a Multi-GPU Benchmark Suite
Updated
Sep 12, 2018
Cuda
Altium Designer 13 Board layout template containing an empty Mini PCI Express PCB. foot print library and schematic symbol.
OPAE porting to Xilinx FPGA devices.
ONI-compatible hardware, firmware, and host APIs for advanced neuroscience experiments.
Updated
Aug 28, 2021
HTML
PCIe (1.0a to 2.0) Virtual host model for verilog
A simple x86 operating system with graphical user space
This is a repo that contains directions and the necessary files to create a working pop!_OS -> Windows 10 KVM that has GPU Passthrough, CPU Passthrough with proper pinning, Allocated ram, and PCIe passthrough with QEMU and Virt-Manager.
Updated
May 18, 2022
Shell
PCIe adapter for an FPGA accelerator for Open CloudServer
Program to read/write from/to any location in physical memory (cloned from devmem or devmem2). See wiki.
문c 블로그 with ARM64 Linux Kernel 5.x
Tiny baseboard for Raspberry Pi Compute Module 4 with m.2 card slot
Mainline kernel Orange Pi 3 (Allwinner H6) with custom DTS, USB3, WiFi, Ethernet (dwmac_meson8b regulator patch), PCI-E patches. EL2 Hypervisor for quirky PCI-E controller.
A platform for emulating Virtio devices with FPGAs
Updated
Mar 31, 2021
SystemVerilog
The source code for the XTRX FPGA image
Updated
Aug 25, 2021
Verilog
Virtio front-end and back-end bridge, implemented with FPGA.
Updated
Sep 16, 2020
SystemVerilog
A collection of configs, thoughts, and troubleshooting steps for my vfio setup
NVIDIA GPUDirect using SISCI API and C++
way to use xapp1052 with new version of PCIe IP core(AXI bus)
Updated
Apr 5, 2018
Verilog
Implementation of the PCIe physical layer
Updated
Jun 27, 2020
Verilog
Project files for Nanyang Technological University's Realtime Software for Mechatronic Systems (MA4830) course.
Forked for contribution. OCP2.0网卡的PCIE转接板。| A PCB adapter to let OCP 2.0 network card fit to insert into PCIE slot (Contributed).
Updated
Nov 29, 2021
KiCad Layout
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