cfallin

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Chris Fallin cfallin

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Software engineer with a focus on compilers. Currently hacking on WebAssembly-related technologies at Fastly.

232 followers · 3 following

Fastly
Sunnyvale, CA, USA
https://cfallin.org/

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2 security advisory credits

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Pinned

boolean_expression Public

A Rust library for manipulating and evaluating Boolean expressions and BDDs

Rust 22 9
autopiper Public

Forked from google/autopiper

Compiler for a high-level hardware description language with automatic pipeline synthesis

C++ 7 1
speck Public

speck: the small, portable, efficiently-coded kernel

C 4 2
wasmtime Public

Forked from bytecodealliance/wasmtime

Standalone JIT-style runtime for WebAssembly, using Cranelift

Rust 1 1
nixie2 Public

Circuit design and firmware for a GPS-synchronized Nixie-tube clock

C
bytecodealliance/regalloc2 Public

A new register allocator

Rust 76 8

2,273 contributions in the last year

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Contribution activity

September 2022

Created 23 commits in 5 repositories

Created a pull request in bytecodealliance/wasmtime that received 24 comments

ISLE: merge trie edges across priority levels if possible.

Previously, the ISLE trie-building process (which constructs the tree of match operations lowered into the generated Rust code) generated code for …

+132 −74 • 24 comments

Opened 15 other pull requests in 3 repositories

bytecodealliance/wasmtime 9 merged

bytecodealliance/regalloc2 5 merged

Version 0.4.1. Sep 22
Fix fallback-split behavior: trim start of minimal bundle wrt start of original LR. Sep 22
Version 0.4.0. Sep 21
Version 0.3.3. Sep 20
Some fixes to allow for call instructions to name args, returns, and clobbers with constraints. Sep 9

bytecodealliance/meetings 1 merged

Make Cranelift meetings weekly now (and add agendas). Sep 21

Reviewed 45 pull requests in 4 repositories

bytecodealliance/wasmtime 25 pull requests

Port branches to ISLE (AArch64) Sep 22
Port flag-based ops to ISLE (AArch64) Sep 22
Avoid quadratic behavior in can_optimize_var_lookup Sep 22
ISLE: Resolve overlap in prelude.isle and x64/inst.isle Sep 22
Add an overlap checker to ISLE Sep 21
Improve fcvt_to_{u,s}int_sat lowering (AArch64) Sep 21
Revert "Memoize can_optimize_var_lookup (#4924)" Sep 21
Vector bitcast support (AArch64 & Interpreter) Sep 21
Cranelift: use regalloc2 constraints on caller side of ABI code. Sep 20
ISLE: merge trie edges across priority levels if possible. Sep 20
Add the aegraph (acyclic e-graph) implementation crate. Sep 19
ISLE: add support for multi-extractors and multi-constructors. Sep 19
add riscv64 backend for cranelift. Sep 14
Port icmp to ISLE (AArch64) Sep 13
Remove a debug utility in the publish script Sep 13
s390x: update some regalloc metadata to remove use of reg_mod. Sep 9
Don't merge loads for xmm registers Sep 9
ABI: implement register arguments with constraints. Sep 8
[1.0.0] Fix a release notes typo and fill out links Sep 8
Update release notes for 1.0 Sep 8
Initial forward-edge CFI implementation Sep 8
Bump crates to 1.0.0 and add the release notes for 1.0.0 Sep 7
Remove bitwise operations on floats Sep 7
x64: remove Inst::XmmLoadConst Sep 7
cranelift: Implement missing i128 rotates on AArch64 Sep 7
Some pull request reviews not shown.

bytecodealliance/regalloc2 6 pull requests

Some fixes to allow for call instructions to name args, returns, and clobbers with constraints. Sep 20
Fix design doc typo Sep 20
Remove register class from SpillSlot Sep 20
Handle fixed stack slots in the move resolver Sep 19
Add fixed-non-allocatable operand support Sep 19
Make more PReg & VReg methods const Sep 12

bytecodealliance/meetings 4 pull requests

bytecodealliance/bytecodealliance.org 1 pull request

Reword bullet point about hardware control-flow integrity features Sep 20

36 contributions in private repositories Sep 1 – Sep 22