Skip to content

Popular repositories

  1. cva6 Public

    The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

    SystemVerilog 1.6k 445

  2. cv32e40p Public

    CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

    SystemVerilog 637 282

  3. Functional verification project for the CORE-V family of RISC-V cores.

    Assembly 229 135

  4. cvfpu Public

    Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.

    SystemVerilog 218 74

  5. Instruction Set Generator initially contributed by Futurewei

    C++ 137 35

  6. Documentation for the OpenHW Group's set of CORE-V RISC-V cores

    Makefile 131 67

Repositories