processor

A PDF processor written in Go.

☔️ interface for parsing, inspecting, transforming, and serializing content through syntax trees

Native Operating System and Hardware Information

Intel® Performance Counter Monitor (Intel® PCM)

CoreFreq is a CPU monitoring software designed for the 64-bits Processors.

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

A list of ICs and IPs for AI, Machine Learning and Deep Learning.

Mixin is a trait/mixin and bytecode weaving framework for Java using ASM

🖥️ A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

VeeR EH1 core

A tiny Open POWER ISA softcore written in VHDL 2008

RISC-V processor emulator written in Rust+WASM

Cross-platform process cpu % and memory usage of a PID

The OpenPiton Platform

A feature rich code block preprocessing tool.

A Forth CPU and System on a Chip, based on the J1, written in VHDL

RISC-V Guide. Learn all about the RISC-V computer architecture along with the Development Tools and Operating Systems to develop on RISC-V hardware.

Jest HTML Reporter and Results Processor

A simple RISC-V processor for use in FPGA designs.

Jest test results processor for generating a summary in HTML