OpenHW Group

Popular repositories

1. cva6 Public

   The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

   SystemVerilog 1.7k 492

2. cv32e40p Public

   CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

   SystemVerilog 681 296

3. core-v-verif Public

   Functional verification project for the CORE-V family of RISC-V cores.

   Assembly 264 146

4. cvfpu Public

   Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.

   SystemVerilog 239 78

5. force-riscv Public

   Instruction Set Generator initially contributed by Futurewei

   C++ 151 39

6. programs Public

   Documentation for the OpenHW Group's set of CORE-V RISC-V cores

   Makefile 143 74