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Open source FPGA-based NIC and platform for in-network compute
Verilog 1.1k 275
Forked from alexforencich/verilog-pcie
Verilog PCI express components
Verilog 9 2
Forked from alexforencich/verilog-ethernet
Verilog Ethernet components for FPGA implementation
Verilog 8 4
Verilog AXI stream components for FPGA implementation
AXI interface modules for Cocotb
PCI express simulation framework for Cocotb
Functions for working with timespec structures
Scapy: the Python-based interactive packet manipulation program & library. Supports Python 2 & Python 3.
Verilog AXI components for FPGA implementation
Ethernet interface modules for Cocotb
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